tilelang.language.tir.opΒΆ
AttributesΒΆ
FunctionsΒΆ
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Extract one scalar lane from a fixed-width vector expression. |
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Build expression by calling an intrinsic function. |
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Build expression by calling a pure extern function. |
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Build expression by calling a extern function. |
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Get head access address with memory access pattern info |
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TVM intrinsic for sparse tensor core ptx instructions |
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TVM intrinsic for SM120a warp-level NVF4 block-scaled MMA. |
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TVM intrinsic for ptx tensor core wmma instructions |
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TVM intrinsic for tcgen05.mma shared-memory x shared-memory instructions. |
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TVM intrinsic for tcgen05.mma tensor-memory x shared-memory instructions. |
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TVM intrinsic for tcgen05.mma block-scaled (mxf8f6f4.block_scale) instructions. |
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TVM intrinsic for zero-initalizing an MMA accumulation register |
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TileLang intrinsic for ptx load matrix from shared memory |
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TVM intrinsic for ptx async copy from global to shared memory using cp.async |
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TVM intrinsic for amd matrix core mfma instructions |
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TVM intrinsic for storing the result of PTX MMA into a destination pointer |
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TVM intrinsic for amd matrix core mfma instructions |
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TVM intrinsic for storing the result of PTX MMA into a destination pointer |
TVM intrinsic for ptx fence barrier initialization. |
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TVM intrinsic for ptx barrier arrival with expect tx using mbarrier.arrive.expect_tx |
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infinity value of dtype |
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Reinterpret cast a value to dtype. |
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Round elements of the array to the nearest integer. |
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Fast power operation than pow(float, float). |
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x power y |
Module ContentsΒΆ
- tilelang.language.tir.op.call_packedΒΆ
- tilelang.language.tir.op.call_cpackedΒΆ
- tilelang.language.tir.op.call_packed_loweredΒΆ
- tilelang.language.tir.op.call_cpacked_loweredΒΆ
- tilelang.language.tir.op.call_llvm_intrinΒΆ
- tilelang.language.tir.op.call_llvm_pure_intrinΒΆ
- tilelang.language.tir.op.tvm_stack_allocaΒΆ
- tilelang.language.tir.op.tvm_stack_make_shapeΒΆ
- tilelang.language.tir.op.tvm_stack_make_arrayΒΆ
- tilelang.language.tir.op.assumeΒΆ
- tilelang.language.tir.op.undefΒΆ
- tilelang.language.tir.op.start_profile_intrinsicΒΆ
- tilelang.language.tir.op.end_profile_intrinsicΒΆ
- tilelang.language.tir.op.tvm_tupleΒΆ
- tilelang.language.tir.op.tvm_struct_getΒΆ
- tilelang.language.tir.op.tvm_struct_setΒΆ
- tilelang.language.tir.op.address_ofΒΆ
- tilelang.language.tir.op.lookup_paramΒΆ
- tilelang.language.tir.op.tvm_thread_allreduceΒΆ
- tilelang.language.tir.op.tvm_thread_invariantΒΆ
- tilelang.language.tir.op.tvm_storage_syncΒΆ
- tilelang.language.tir.op.tvm_warp_shuffleΒΆ
- tilelang.language.tir.op.tvm_warp_shuffle_upΒΆ
- tilelang.language.tir.op.tvm_warp_shuffle_downΒΆ
- tilelang.language.tir.op.tvm_warp_activemaskΒΆ
- tilelang.language.tir.op.tvm_throw_last_errorΒΆ
- tilelang.language.tir.op.tvm_load_matrix_syncΒΆ
- tilelang.language.tir.op.tvm_mma_syncΒΆ
- tilelang.language.tir.op.tvm_bmma_syncΒΆ
- tilelang.language.tir.op.tvm_fill_fragmentΒΆ
- tilelang.language.tir.op.tvm_store_matrix_syncΒΆ
- tilelang.language.tir.op.ptx_mmaΒΆ
- tilelang.language.tir.op.mma_storeΒΆ
- tilelang.language.tir.op.ptx_cp_async_bulkΒΆ
- tilelang.language.tir.op.ptx_commit_groupΒΆ
- tilelang.language.tir.op.ptx_wait_groupΒΆ
- tilelang.language.tir.op.ptx_cp_async_barrierΒΆ
- tilelang.language.tir.op.ptx_init_barrier_thread_countΒΆ
- tilelang.language.tir.op.ptx_arrive_barrierΒΆ
- tilelang.language.tir.op.ptx_wait_barrierΒΆ
- tilelang.language.tir.op.create_barriersΒΆ
- tilelang.language.tir.op.vectorlowΒΆ
- tilelang.language.tir.op.vectorhighΒΆ
- tilelang.language.tir.op.vectorcombineΒΆ
- tilelang.language.tir.op.retΒΆ
- tilelang.language.tir.op.min_valueΒΆ
- tilelang.language.tir.op.max_valueΒΆ
- tilelang.language.tir.op.expΒΆ
- tilelang.language.tir.op.exp2ΒΆ
- tilelang.language.tir.op.exp10ΒΆ
- tilelang.language.tir.op.erfΒΆ
- tilelang.language.tir.op.tanhΒΆ
- tilelang.language.tir.op.sigmoidΒΆ
- tilelang.language.tir.op.logΒΆ
- tilelang.language.tir.op.log2ΒΆ
- tilelang.language.tir.op.log10ΒΆ
- tilelang.language.tir.op.log1pΒΆ
- tilelang.language.tir.op.tanΒΆ
- tilelang.language.tir.op.cosΒΆ
- tilelang.language.tir.op.coshΒΆ
- tilelang.language.tir.op.acosΒΆ
- tilelang.language.tir.op.acoshΒΆ
- tilelang.language.tir.op.sinΒΆ
- tilelang.language.tir.op.sinhΒΆ
- tilelang.language.tir.op.asinΒΆ
- tilelang.language.tir.op.asinhΒΆ
- tilelang.language.tir.op.atanΒΆ
- tilelang.language.tir.op.atanhΒΆ
- tilelang.language.tir.op.atan2ΒΆ
- tilelang.language.tir.op.sqrtΒΆ
- tilelang.language.tir.op.rsqrtΒΆ
- tilelang.language.tir.op.clzΒΆ
- tilelang.language.tir.op.floorΒΆ
- tilelang.language.tir.op.ceilΒΆ
- tilelang.language.tir.op.truncΒΆ
- tilelang.language.tir.op.absΒΆ
- tilelang.language.tir.op.bitwise_andΒΆ
- tilelang.language.tir.op.bitwise_notΒΆ
- tilelang.language.tir.op.bitwise_orΒΆ
- tilelang.language.tir.op.bitwise_xorΒΆ
- tilelang.language.tir.op.nearbyintΒΆ
- tilelang.language.tir.op.nextafterΒΆ
- tilelang.language.tir.op.hypotΒΆ
- tilelang.language.tir.op.copysignΒΆ
- tilelang.language.tir.op.ldexpΒΆ
- tilelang.language.tir.op.likelyΒΆ
- tilelang.language.tir.op.isnanΒΆ
- tilelang.language.tir.op.isnullptrΒΆ
- tilelang.language.tir.op.isfiniteΒΆ
- tilelang.language.tir.op.isinfΒΆ
- tilelang.language.tir.op.popcountΒΆ
- tilelang.language.tir.op.q_multiply_shiftΒΆ
- tilelang.language.tir.op.q_multiply_shift_per_axisΒΆ
- tilelang.language.tir.op.shift_leftΒΆ
- tilelang.language.tir.op.shift_rightΒΆ
- tilelang.language.tir.op.fmodΒΆ
- tilelang.language.tir.op.if_then_elseΒΆ
- tilelang.language.tir.op.truncdivΒΆ
- tilelang.language.tir.op.truncmodΒΆ
- tilelang.language.tir.op.floordivΒΆ
- tilelang.language.tir.op.floormodΒΆ
- tilelang.language.tir.op.ceildivΒΆ
- tilelang.language.tir.op.TVMBackendAllocWorkspaceΒΆ
- tilelang.language.tir.op.TVMBackendFreeWorkspaceΒΆ
- tilelang.language.tir.op.anylist_getitemΒΆ
- tilelang.language.tir.op.anylist_resetitemΒΆ
- tilelang.language.tir.op.anylist_setitem_call_packedΒΆ
- tilelang.language.tir.op.anylist_setitem_call_cpackedΒΆ
- tilelang.language.tir.op.vscaleΒΆ
- tilelang.language.tir.op.extract_lane(vector, lane, span=None)ΒΆ
Extract one scalar lane from a fixed-width vector expression.
- Parameters:
vector (PrimExpr) β The vector expression to extract from.
lane (int or IntImm) β The zero-based lane index. The index must be known at compile time.
span (Optional[Span]) β The location of this expression in the source code.
- Returns:
result β A scalar expression with the vectorβs element dtype.
- Return type:
PrimExpr
- tilelang.language.tir.op.call_intrin(dtype, func_name, *args, annotations=None, span=None)ΒΆ
Build expression by calling an intrinsic function.
Intrinsics can be overloaded with multiple data types via the intrinsic translation rule.
- Parameters:
dtype (str) β The data type of the result.
func_name (str) β The intrinsic function name.
args (list) β Positional arguments.
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.call_pure_extern(dtype, func_name, *args, span=None)ΒΆ
Build expression by calling a pure extern function.
- Parameters:
dtype (str) β The data type of the result.
func_name (str) β The extern function name.
args (list) β Positional arguments.
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.call_extern(dtype, func_name, *args, span=None)ΒΆ
Build expression by calling a extern function.
- Parameters:
dtype (str) β The data type of the result.
func_name (str) β The extern function name.
args (list) β Positional arguments.
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.tvm_access_ptr(ptype, data, offset, extent, rw_mask)ΒΆ
Get head access address with memory access pattern info
- Parameters:
ptype (Expr) β The data type of pointer.
data (DType*) β The data of pointer.
offset (int) β The offset of pointer.
extent (int) β The extent of pointer.
rw_mask (int) β The read write mask.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_mma_sp(dtype, shape, A_layout, B_layout, A_dtype, B_dtype, C_dtype, multiplicand_a, a_index, multiplicand_b, b_index, accumulator, c_index, metadata, meta_index, sparse_selector, saturate)ΒΆ
TVM intrinsic for sparse tensor core ptx instructions https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-for-sparse-mma
- Parameters:
dtype (str) β The data type of the result.
shape (str) β The shape of mma fragment.
A_layout (Literal["row", "col"]) β The layout of multiplicand fragment A.
B_layout (Literal["row", "col"]) β The layout of multiplicand fragment B.
A_dtype (str) β The data type of multiplicand fragment A.
B_dtype (str) β The data type of multiplicand fragment B.
C_dtype (str) β The data type of accumulator fragment C.
multiplicand_a (Var) β The multiplicand fragment A variable.
a_index (Expr) β The index of multiplicand fragment A.
multiplicand_b (Var) β The multiplicand fragment B variable.
b_index (Expr) β The index of multiplicand fragment B.
accumulator (Var) β The accumulator fragment C variable.
c_index (Expr) β The index of accumulator fragment C.
metadata (Expr) β The metadata of operand.
meta_index (Expr) β The metadata index of operand.
sparse_selector (Expr) β The sparse selector indicating the thread that stores the metadata.
saturate (bool) β The optional saturation at the output.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_mma_block_scale(accum_dtype, shape, A_layout, B_layout, kind, scale_vec_size, A_dtype, B_dtype, scale_type, multiplicand_a, a_index, multiplicand_b, b_index, accumulator, c_index, scale_a, scale_b, scale_a_byte_id=0, scale_a_thread_id=0, scale_b_byte_id=0, scale_b_thread_id=0)ΒΆ
TVM intrinsic for SM120a warp-level NVF4 block-scaled MMA.
- tilelang.language.tir.op.ptx_wgmma_ss(dtype, wgmma_prefix, a_is_k_major, b_is_k_major, a_dtype_abbrv, b_dtype_abbrv, accum_dtype_abbrv, A_desc, A_offset, B_desc, B_offset, C_data, C_offset, scale_out, scale_in_a, scale_in_b)ΒΆ
TVM intrinsic for ptx tensor core wmma instructions https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-for-wmma
- tilelang.language.tir.op.ptx_wgmma_rs(dtype, wgmma_prefix, b_is_k_major, a_dtype_abbrv, b_dtype_abbrv, accum_dtype_abbrv, A_buf, A_offset, B_desc, B_offset, C_data, C_offset, scale_out, scale_in_a, scale_in_b)ΒΆ
- tilelang.language.tir.op.ptx_wgmma_sp_ss(dtype, wgmma_prefix, a_is_k_major, b_is_k_major, a_dtype_abbrv, b_dtype_abbrv, accum_dtype_abbrv, A_desc, A_offset, E_data, E_offset, sparse_selector, B_desc, B_offset, C_data, C_offset, scale_out, scale_in_a, scale_in_b)ΒΆ
- tilelang.language.tir.op.ptx_wgmma_sp_rs(dtype, wgmma_prefix, b_is_k_major, a_dtype_abbrv, b_dtype_abbrv, accum_dtype_abbrv, A_buf, A_offset, E_buf, E_offset, sparse_selector, B_desc, B_offset, C_data, C_offset, scale_out, scale_in_a, scale_in_b)ΒΆ
- tilelang.language.tir.op.ptx_tcgen05_mma_ss(kind_dtype, desc_a, A_offset, desc_b, B_offset, C_ptr, C_offset, desc_val, scale_out, mask0, mask1, mask2, mask3, enable_ws=False, enable_2cta=False, ws=None, warp_specialized=None, variant=None)ΒΆ
TVM intrinsic for tcgen05.mma shared-memory x shared-memory instructions.
Expects 14 or 15 positional arguments: (kind_dtype, desc_a, A_offset, desc_b, B_offset, C_ptr, C_offset,
desc_val, scale_out, mask0, mask1, mask2, mask3[, enable_ws]).
Aliases: you can also pass ws or warp_specialized (booleans) instead of enable_ws. Alternatively, use variant=βwsβ (or βdefaultβ). - kind_dtype: instruction kind selector (e.g., T.float16 for kind::f16,
βtf32β for kind::tf32, βint8β for kind::i8, βfloat8_e4m3β for kind::f8f6f4).
- tilelang.language.tir.op.ptx_tcgen05_mma_ts(kind_dtype, A_ptr, A_offset, desc_b, B_offset, C_ptr, C_offset, desc_val, scale_out, mask0, mask1, mask2, mask3, enable_2cta=False)ΒΆ
TVM intrinsic for tcgen05.mma tensor-memory x shared-memory instructions.
Expects 13 positional arguments: (kind_dtype, A_ptr, A_offset, desc_b, B_offset, C_ptr, C_offset,
desc_val, scale_out, mask0, mask1, mask2, mask3).
kind_dtype: instruction kind selector (e.g., T.float16 for kind::f16, βtf32β for kind::tf32, βint8β for kind::i8, βfloat8_e4m3β for kind::f8f6f4).
- tilelang.language.tir.op.ptx_tcgen05_mma_blockscaled_ss(kind_dtype, desc_a, A_offset, desc_b, B_offset, C_ptr, C_offset, desc_val, scale_out, sfa_ptr, sfa_offset, sfb_ptr, sfb_offset, reserved0=0, reserved1=0, enable_2cta=False)ΒΆ
TVM intrinsic for tcgen05.mma block-scaled (mxf8f6f4.block_scale) instructions.
Block-scaled TCGEN05 is explicit-async and carries an explicit
enable_2ctaflag, analogous to the regular SS/TS TCGEN05 intrinsics. There is no fallback path if 2CTA is requested.Positional args: kind_dtype, desc_a, A_offset, desc_b, B_offset, C_ptr, C_offset, desc_val, scale_out, sfa_ptr, sfa_offset, sfb_ptr, sfb_offset, reserved0, reserved1, enable_2cta.
- tilelang.language.tir.op.mma_fill(dtype, local_size, local_ptr, offset)ΒΆ
TVM intrinsic for zero-initalizing an MMA accumulation register
- Parameters:
dtype (str) β The data type of the result.
local_size (IntImm) β The number of elements.
local_ptr (Var) β The destination pointer variable.
offset (Expr) β The destination offset.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_ldmatrix(trans, num, src_access_ptr, dst_access_ptr)ΒΆ
TileLang intrinsic for ptx load matrix from shared memory
Uses tl.ptx_ldmatrix which expects access pointers created via T.access_ptr (i.e. tl.access_ptr wrapping a BufferLoad).
- Parameters:
trans (bool) β The matrix is loaded in column-major format.
num (IntImm) β The number of matrices (2 or 4).
src_access_ptr (PrimExpr) β A tl.access_ptr pointing to the source (shared memory) buffer.
dst_access_ptr (PrimExpr) β A tl.access_ptr pointing to the destination (local/register) buffer.
- Returns:
call β The call expression (handle-typed).
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_cp_async(dst_access_ptr, src_access_ptr, num_elems, predicate=None)ΒΆ
TVM intrinsic for ptx async copy from global to shared memory using cp.async https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cp-async
- Parameters:
dst_access_ptr (PrimExpr) β The destination (shared memory) access pointer created by tvm_access_ptr. Should include pointer, offset, extent, and write access flag (rw_mask=2).
src_access_ptr (PrimExpr) β The source (global memory) access pointer created by tvm_access_ptr. Should include pointer, offset, extent, and read access flag (rw_mask=1).
num_elems (int or PrimExpr) β
The number of logical elements to copy.
For TileLangβs
tl.ptx_cp_asyncfrontend op, the final PTX byte width is derived later fromnum_elems * element_bits(access_ptr)and must eventually land on a legalcp.asyncwidth of 4, 8, or 16 bytes.predicate (PrimExpr, optional) β Optional predicate condition for conditional cp.async. When provided, the copy will only be performed if the predicate evaluates to true. Otherwise, the destination will be filled with zeros (default behavior of cp.async).
- Returns:
call β The call expression.
- Return type:
PrimExpr
Examples
>>> # Copy 16 uint8 elements (= 16 bytes) from global to shared memory >>> T.ptx_cp_async( ... T.tvm_access_ptr(T.type_annotation(T.uint8), A_shared.data, 0, 16, 2), # dst ... T.tvm_access_ptr(T.type_annotation(T.uint8), B_global.data, 0, 16, 1), # src ... 16 # num_elems ... ) >>> >>> # Predicated cp.async (only copy if condition is true) >>> T.ptx_cp_async( ... T.tvm_access_ptr(T.type_annotation(T.uint8), A_shared.data, 0, 16, 2), ... T.tvm_access_ptr(T.type_annotation(T.uint8), B_global.data, 0, 16, 1), ... 16, ... predicate=guard # only copy if guard is true ... )
- tilelang.language.tir.op.tvm_mfma(dtype, shape, A_layout, B_layout, A_dtype, B_dtype, C_dtype, multiplicand_a, a_index, multiplicand_b, b_index, accumulator, c_index)ΒΆ
TVM intrinsic for amd matrix core mfma instructions https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-for-mma
- Parameters:
dtype (str) β The data type of the result.
shape (str) β The shape of mma fragment.
A_layout (Literal["row", "col"]) β The layout of multiplicand fragment A.
B_layout (Literal["row", "col"]) β The layout of multiplicand fragment B.
A_dtype (str) β The data type of multiplicand fragment A.
B_dtype (str) β The data type of multiplicand fragment B.
C_dtype (str) β The data type of accumulator fragment C.
multiplicand_a (Var) β The multiplicand fragment A variable.
a_index (Expr) β The index of multiplicand fragment A.
multiplicand_b (Var) β The multiplicand fragment B variable.
b_index (Expr) β The index of multiplicand fragment A.
accumulator (Var) β The accumulator fragment C variable.
c_index (Expr) β The index of accumulator fragment C.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.tvm_mfma_store(dtype, m, n, dst_ptr, src_ptr, src_offset, dst_stride)ΒΆ
TVM intrinsic for storing the result of PTX MMA into a destination pointer
- Parameters:
dtype (str) β The data type of the result.
m (IntImm) β The shape of mma fragment.
n (IntImm) β The shape of mma fragment.
dst_ptr (Var) β The destination pointer variable.
src_ptr (Var) β The source pointer variable.
src_offset (Expr) β The source offset.
dst_stride (Var) β The destination stride.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.tvm_rdna_wmma(dtype, shape, A_layout, B_layout, A_dtype, B_dtype, C_dtype, multiplicand_a, a_index, multiplicand_b, b_index, accumulator, c_index)ΒΆ
TVM intrinsic for amd matrix core mfma instructions https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-for-mma
- Parameters:
dtype (str) β The data type of the result.
shape (str) β The shape of mma fragment.
A_layout (Literal["row", "col"]) β The layout of multiplicand fragment A.
B_layout (Literal["row", "col"]) β The layout of multiplicand fragment B.
A_dtype (str) β The data type of multiplicand fragment A.
B_dtype (str) β The data type of multiplicand fragment B.
C_dtype (str) β The data type of accumulator fragment C.
multiplicand_a (Var) β The multiplicand fragment A variable.
a_index (Expr) β The index of multiplicand fragment A.
multiplicand_b (Var) β The multiplicand fragment B variable.
b_index (Expr) β The index of multiplicand fragment A.
accumulator (Var) β The accumulator fragment C variable.
c_index (Expr) β The index of accumulator fragment C.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.tvm_rdna_wmma_store(dtype, m, n, dst_ptr, src_ptr, src_offset, dst_stride)ΒΆ
TVM intrinsic for storing the result of PTX MMA into a destination pointer
- Parameters:
dtype (str) β The data type of the result.
m (IntImm) β The shape of mma fragment.
n (IntImm) β The shape of mma fragment.
dst_ptr (Var) β The destination pointer variable.
src_ptr (Var) β The source pointer variable.
src_offset (Expr) β The source offset.
dst_stride (Var) β The destination stride.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_fence_barrier_init()ΒΆ
TVM intrinsic for ptx fence barrier initialization.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.ptx_arrive_barrier_expect_tx(barrier_id, byte_count)ΒΆ
TVM intrinsic for ptx barrier arrival with expect tx using mbarrier.arrive.expect_tx https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-mbarrier-arrive https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-mbarrier-expect-tx-operation
- Parameters:
barrier_id (int) β The ID of the barrier shared memory pointer.
byte_count (int) β Increases the tx count of the mbarrier object to track completion of additional async transactions.
- Returns:
call β The call expression.
- Return type:
PrimExpr
- tilelang.language.tir.op.infinity(dtype, span=None)ΒΆ
infinity value of dtype
- Parameters:
dtype (str) β The data type.
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
value β The infinity value of dtype.
- Return type:
tvm.Expr
- tilelang.language.tir.op.reinterpret(value, dtype, span=None)ΒΆ
Reinterpret cast a value to dtype.
- Parameters:
value (PrimExpr) β The input value.
dtype (str) β The data type.
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
value β The reinterpret cast value of dtype.
- Return type:
tvm.Expr
- tilelang.language.tir.op.round(x, rounding_mode='ties-to-even', span=None)ΒΆ
Round elements of the array to the nearest integer.
- Parameters:
x (PrimExpr) β Input argument.
rounding_mode (str) β Rounding mode to use. Supported values are
"ties-to-even"and"ties-away-from-zero"."ties-to-even"is the default and matches the existing TileLang/TVM semantics.span (Optional[Span]) β The location of this operator in the source code.
- Returns:
y β The result.
- Return type:
PrimExpr
- tilelang.language.tir.op.pow_of_int(x, y)ΒΆ
Fast power operation than pow(float, float).
- Parameters:
x (PrimExpr) β Base value
y (int) β Exponent value
- Return type:
tvm.ir.PrimExpr
- tilelang.language.tir.op.pow(x, y, span=None)ΒΆ
x power y
- Parameters:
x (PrimExpr) β Input argument.
y (PrimExpr) β The exponent
span (Optional[Span]) β The location of this operator in the source code.
- Returns:
z β The result.
- Return type:
PrimExpr